Semiconductor chip mounting methods are known in the art which connect semiconductor chips to substrate electrodes via protruding bump electrodes formed, for example, by gold or solder plating. Japanese Unexamined Patent Publication No. 2008-021751, for example, discloses an electrode connecting structure for a semiconductor chip wherein protruding electrodes are formed on the semiconductor chip side and electrodes each having an insertion opening are formed on the substrate side, and wherein the electrodes of the semiconductor chip are inserted in the insertion openings of the corresponding substrate electrodes by being slidingly guided along the opening edges of the insertion openings of the respective substrate electrodes so that the electrodes of the semiconductor chip are each centered in the corresponding substrate electrode for connection. The invention disclosed in this patent document claims that, with this connecting structure, any positional displacement that may occur between the electrodes is corrected during bonding.
On the other hand, Japanese Unexamined Patent Publication No. 2003-124378 discloses a chip component in which a device chip is mounted on the upper surface of a substrate and two electrodes connected to the device chip are disposed at opposite ends of the lower surface of the substrate, wherein at least one crest or trough is formed on the opposing ends of the two electrodes. According to this chip component, even when the component is mounted sideways, squeezing out or drooping of a solder paste can be suppressed, preventing the solder paste from building up in the lower part of the bonding portion. As a result, occurrence of a short circuit between the two electrodes and formation of solder side balls can be prevented.